write bus造句

A WS ( write S ) control signal moved the address from the write bus into the S register.
The cache is accessed via two unidirectional buses, a 256-bit read bus and a 128-bit write bus.
However, most stack machines are built from larger circuit components where the N data buffers are stored together within a register file and share read / write buses.
The downsides to this approach are; it introduces latency to the memory request, it requires additional power consumption for the buffer chips, and current implementations create a memory write bus significantly narrower than the memory read bus.
Data transfers worked like this : To move the address of the next instruction from the B register to the S register, an RB ( read B ) control signal was issued; this caused the address to move from register B to the read bus, and then to the write bus.
It's difficult to find write bus in a sentence. 用write bus造句挺难的